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Building a 6800 CPU on an FPGA with nMigen (part 1)

Robert Baruch · 27.2K views · 2019-12-13 · 24:46

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Overview

The first part of Robert Baruch's series on building a 6800 CPU on an FPGA with nMigen, a Python-based hardware description language. It introduces the HDL while implementing a simpler 6800 core.

On Hacker News

HN recommends the series as a practical introduction to nMigen and formal verification for CPU design.

Recommended by 3 HN people across 4 months · HN mentions 2020–2021

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What people said

krasin · 2021-09 · Recommendation

TinyFPGA BX ([1]) and nmigen/yosys as the fully open source toolchain for generating logic with Python and formally verifying it ([2], [3]). There is a good nMigen tutorial by Robert Baruch ([4]. [5]). Alternatively, if you really want to try Verilog first (not a bad idea), I enjoyed reading a book "Designing Video Game Hardware in Verilog" ([6]). 1. [LINK] 2. [LINK] 3. [LINK] 4. [LINK] 5. [VIDEO] 6. [LINK]

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MrRadar · 2021-03 · Recommendation

Robert Baruch on Youtube is building a RISC-V CPU core of comparable complexity to the one in the OP using nMigen which is an HDL based on Python and it looks like a very nice tool to work with relative to other HDLs I've seen (though I've never had to actually use an HDL myself before so I may not be the best judge). Here's a playlist of the video series, with the earlier videos basically being an introduction to nMigen: [LINK] He's got another series that's focused more on the HDL itself building a (relatively much simpler) 6800 CPU core: [VIDEO]

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krasin · 2020-08 · Recommendation

nMigen is pretty cool and capable. I can only recommend these Youtube series, where nMigen is used to build a full 6800 CPU: [VIDEO]

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Sources

Video by Robert Baruch, played through YouTube.

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