Tuesday @ 1130 ISA Shootout – a Comparison of RISC V, ARM, and x86 Chris Celio, UC Berkeley V2

What people said

legulere · 2016-08 · Strong recommendation

> If you look at functionality per instruction byte, RISC is fairly low. You should watch this video: [VIDEO] The most important information therein is that the difference in code density is minuscule between x86, ARM and RISC-V. The differences between GCC versions is even bigger. > The equations that you have to resolve to issue an X86 instruction are simply more complex than for ARM, and all that bit-flipping consumes power. It's actually just 3-10% of power consumption [1] and I even heard it claimed that the instruction decoding on ARM is larger than x86 [1] [LINK]

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dkjaudyeqooe · 2020-12 · Recommendation

At best, that's a simplistic and misleading view, see the following talk for an in depth analysis: "Comparison of RISC V, ARM, and x86" [VIDEO]

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microcolonel · 2019-02 · Reference

As of early 2016, with the GCC port at that time, RV32GC was as dense as Thumb, and RV64GC was denser than AArch64 and every other major 64-bit ISA, including AMD64. Though RV64G (no C) was in some extreme cases up to 50% larger than AArch64 (due to inlining memcpy and memset, which are a bit larger without compressed instructions), but usually around the same (except MIPS64, which is way larger than the other 64-bit ISAs, probably because of exposed delay slots). [0] There's some indication that density should have increased somewhat since then, but I haven't looked at it myself. [0]: [VIDEO]

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