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Building AI Silicon

Tenstorrent · 16.9K views · 2021-11-18 · 14:21

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Overview

Jim Keller, CTO of Tenstorrent, talks at Samsung Foundry's SAFE 2021 about building AI silicon through modular, provable design. The talk also touches on Tenstorrent's RISC-V Ascalon core.

On Hacker News

HN cites it as a source on Tenstorrent's wide-issue RISC-V Ascalon CPU in RISC-V threads.

Discussed on HN; no positive recommendation is recorded in this export · HN mentions 2022–2022

Topics

Computer architecture & CPUsSemiconductors & chip manufacturingMachine learning & deep learning
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jim kellertenstorrentrisc-vascalonai hardware

What people said

snvzz · 2022-09 · Reference

They're apparently working on one, in-house[0]. It's apparently called Ascalon, and there's some information starting at around 8 minutes into the video. 0. [VIDEO]

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hajile · 2022-03 · Reference

Jim Keller's team is creating a 6-wide issue RISC-V CPU. It should have similar IPC as ARM X1 or AMD Zen 3. [VIDEO]

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hajile · 2022-03 · Reference

Jim Keller is overseeing a very large RISC-V core that should be around the same performance level as X1 or Zen 3. I guess we'll see what the ISA can do pretty soon. He said they were talking about open-sourcing the CPU block. If they did (the CPU isn't their core business), we could see lots of RISC-V competition popping up. The age of CPUs being commodity items seems to be approaching. [VIDEO]

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Sources

Video by Tenstorrent, played through YouTube.

Data and selection notes

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